1. Field
The present disclosure pertains to the field of computer chip design. More particularly, the present disclosure pertains to a new method, system, and apparatus for an adaptive weighted arbiter.
2. Description of Related Art
Typically, electronic systems include an arbitration logic for arbitrating between requests received from the multiple requesting agents, and for granting access to a resource to a selected one of the requesting agents. For example, a requesting agent may be a modem, keyboard, video controller, serial port, or PCMCIA card, SONET interface, Ethernet Interface, content processor, encryption device, or compression device and a resource may be an interconnect bus, memory unit, or output buffer. In some situations, such as, peer-to-peer systems, the device may be either the requesting agent and/or the arbitrated resource.
Present arbitration schemes include round-robin arbiters that are based at least in part on a scheduling algorithm that creates a list of all possible requesting agents (“bidders”). Next, the arbiter assigns a window of time fixed bidding opportunities for each bidder into a table. The arbiter then traverses the table and determines whether the particular bidder is requesting access to the resource. If so, the arbiter grants access to that particular bidder. Otherwise, the arbiter proceeds to the next bidder in the list entry in the table. However, the present round-robin arbiter does not account for past arbitration events. Furthermore, a fixed scheduling algorithm may require bidders to wait for their particular window of time (“time slice”) fixed bidding opportunity in the table.